First inexact computer chip aimed at developing world

Moving from theory to reality, US researchers have unveiled the world’s first inexact computer chip (pictured). Error checking on the chip is only enforced for applications that require accuracy; other less fussy applications – such as video rendering – are processed with errors that are not discernible to the user. The benefit is a chip that the developers claim is around 15 times more efficient than today’s computer chips. The development team, from Rice University, Nanyang Technological University in Singapore, Switzerland’s Center for Electronics and Microtechnology (CSEM) and the University of California, Berkeley, believe the chip could power computing devices in the developing world from only solar power.

“It is exciting to see this technology in a working chip that we can measure and validate for the first time,” said project leader Krishna Palem, from the Rice Institute for Sustainable and Applied Infodynamics (ISAID). “Our work since 2003 showed that significant gains were possible, and I am delighted that these working chips have met and even exceeded our expectations.”

The concept behind the chip is simple. Slash power use by allowing processing components – like hardware for adding and multiplying numbers – to make a few mistakes. By managing the probability of errors and limiting which calculations produce errors, the designers have found they can simultaneously cut energy demands and dramatically boost performance.

“Particular types of applications can tolerate quite a bit of error. For example, the human eye has a built-in mechanism for error correction. We used inexact adders to process images and found that relative errors up to 0.54 percent were almost indiscernible, and relative errors as high as 7.5 percent still produced discernible images,” explained researcher Christian Enz, who led the CSEM arm of the collaboration.

Another example of the inexact design approach is “pruning,” or trimming away some of the rarely used portions of digital circuits on a microchip. In previous research, the researchers showed that pruning some sections of traditionally designed off-the-shelf microchips could boost performance in three ways: The pruned chips were twice as fast, used half as much energy and were half the size. In the new study, the team delved deeper and implemented these ideas in the processing elements on the prototype silicon chip.

“In the latest tests, we showed that pruning could cut energy demands 3.5 times with chips that deviated from the correct value by an average of 0.25 percent,” said Rice’s Avinash Lingamneni. “When we factored in size and speed gains, these chips were 7.5 times more efficient than regular chips. Chips that got wrong answers with a larger deviation of about 8 percent were up to 15 times more efficient.”

The inexact chip is likely to be a key component in ISAID’s planned iPad-like I-slate educational tablet, designed for Indian classrooms with no electricity. Officials in India’s Mahabubnagar District are bullish about the device and have announced plans to adopt 50,000 I-slates into middle and high school classrooms over the next three years.

Rice’s Palem said the hardware and graphic content for the I-slate are being developed in tandem. The chips are expected to cut power requirements in half and allow the I-slate to run on solar power from small panels similar to those used on handheld calculators. The first I-slates to contain inexact chips are expected by 2013.

Discuss this article in our forum
Physicists explore negative entropy in computation
International team claim organic computing breakthrough
Chaos computing researcher touts new silicon “chaogate”
Harvested TV, radio signals power devices

Source: Rice University

, ,

Comments are closed.

Powered by WordPress. Designed by WooThemes